z8@( :@openpandora,omap3-pandora-1ghzti,omap3630ti,omap36xxti,omap3 +7Pandora Handheld Console 1GHzchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000!l/ocp@68000000/spi@48098000/lcd@1cpus+cpu@0arm,cortex-a8ucpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+ "@]pinmux_mmc1_pins0e]pinmux_mmc2_pinsPe(*,.02468:]pinmux_dss_dpi_pinse^] pinmux_uart3_pinsenAp]pinmux_leds_pins e$&`b]pinmux_button_pinse]pinmux_penirq_pinse]pinmux_twl4030_pinseA]scm_conf@270sysconsimple-busp0+ p0]pbias_regulator@2b0ti,pbias-omap3ti,pbias-omapypbias_mmc_omap2430pbias_mmc_omap2430w@-]clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh] mcbsp5_fckti,composite-clock ]mcbsp1_mux_fck@4ti,composite-mux-clock] mcbsp1_fckti,composite-clock ]mcbsp2_mux_fck@4ti,composite-mux-clock ]mcbsp2_fckti,composite-clock]mcbsp3_mux_fck@68ti,composite-mux-clock h]mcbsp3_fckti,composite-clock]mcbsp4_mux_fck@68ti,composite-mux-clock h]mcbsp4_fckti,composite-clock]clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ "@pinmux_twl4030_vpins e]target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss ick+ H ` aes1@0 ti,omap3-aesP   txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss ick+ H P aes2@0 ti,omap3-aesP ABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockY]osc_sys_ck@d40 ti,mux-clock @]sys_ck@1270ti,divider-clock*p5]"sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockLWdpll3_m2x2_ckfixed-factor-clockLW]!dpll4_x2_ckfixed-factor-clock LWcorex2_fckfixed-factor-clock!LW]#wkup_l4_ickfixed-factor-clock"LW]Rcorex2_d3_fckfixed-factor-clock#LW]corex2_d5_fckfixed-factor-clock#LW]clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clock]Dvirt_12m_ck fixed-clock]virt_13m_ck fixed-clock]@]virt_19200000_ck fixed-clock$]virt_26000000_ck fixed-clock]virt_38_4m_ck fixed-clockI]dpll4_ck@d00ti,omap3-dpll-per-j-type-clock"" D 0] dpll4_m2_ck@d48ti,divider-clock *? H5]$dpll4_m2x2_mul_ckfixed-factor-clock$LW]%dpll4_m2x2_ck@d00ti,hsdiv-gate-clock% a]&omap_96m_alwon_fckfixed-factor-clock&LW]-dpll3_ck@d00ti,omap3-dpll-core-clock"" @ 0]dpll3_m3_ck@1140ti,divider-clock*@5]'dpll3_m3x2_mul_ckfixed-factor-clock'LW](dpll3_m3x2_ck@d00ti,hsdiv-gate-clock(  a])emu_core_alwon_ckfixed-factor-clock)LW]fsys_altclk fixed-clock]2mcbsp_clks fixed-clock]dpll3_m2_ck@d40ti,divider-clock* @5]core_ckfixed-factor-clockLW]*dpll1_fck@940ti,divider-clock** @5]+dpll1_ck@904ti,omap3-dpll-clock"+  $ @ 4]dpll1_x2_ckfixed-factor-clockLW],dpll1_x2m2_ck@944ti,divider-clock,* D5]@cm_96m_fckfixed-factor-clock-LW].omap_96m_fck@d40 ti,mux-clock." @]Idpll4_m3_ck@e40ti,divider-clock * @5]/dpll4_m3x2_mul_ckfixed-factor-clock/LW]0dpll4_m3x2_ck@d00ti,hsdiv-gate-clock0 a]1omap_54m_fck@d40 ti,mux-clock12 @]<cm_96m_d2_fckfixed-factor-clock.LW]3omap_48m_fck@d40 ti,mux-clock32 @]4omap_12m_fckfixed-factor-clock4LW]Kdpll4_m4_ck@e40ti,divider-clock *@5]5dpll4_m4x2_mul_ckti,fixed-factor-clock5w]6dpll4_m4x2_ck@d00ti,gate-clock6 a]dpll4_m5_ck@f40ti,divider-clock *?@5]7dpll4_m5x2_mul_ckti,fixed-factor-clock7w]8dpll4_m5x2_ck@d00ti,hsdiv-gate-clock8 a]ndpll4_m6_ck@1140ti,divider-clock *?@5]9dpll4_m6x2_mul_ckfixed-factor-clock9LW]:dpll4_m6x2_ck@d00ti,hsdiv-gate-clock: a];emu_per_alwon_ckfixed-factor-clock;LW]gclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock* p]=clkout2_src_mux_ck@d70ti,composite-mux-clock*".< p]>clkout2_src_ckti,composite-clock=>]?sys_clkout2@d70ti,divider-clock?*@ pmpu_ckfixed-factor-clock@LW]Aarm_fck@924ti,divider-clockA $*emu_mpu_alwon_ckfixed-factor-clockALW]hl3_ick@a40ti,divider-clock** @5]Bl4_ick@a40ti,divider-clockB* @5]Crm_ick@c40ti,divider-clockC* @5gpt10_gate_fck@a00ti,composite-gate-clock"  ]Egpt10_mux_fck@a40ti,composite-mux-clockD" @]Fgpt10_fckti,composite-clockEFgpt11_gate_fck@a00ti,composite-gate-clock"  ]Ggpt11_mux_fck@a40ti,composite-mux-clockD" @]Hgpt11_fckti,composite-clockGHcore_96m_fckfixed-factor-clockILW]mmchs2_fck@a00ti,wait-gate-clock ]mmchs1_fck@a00ti,wait-gate-clock ]i2c3_fck@a00ti,wait-gate-clock ]i2c2_fck@a00ti,wait-gate-clock ]i2c1_fck@a00ti,wait-gate-clock ]mcbsp5_gate_fck@a00ti,composite-gate-clock  ] mcbsp1_gate_fck@a00ti,composite-gate-clock  ] core_48m_fckfixed-factor-clock4LW]Jmcspi4_fck@a00ti,wait-gate-clockJ ]mcspi3_fck@a00ti,wait-gate-clockJ ]mcspi2_fck@a00ti,wait-gate-clockJ ]mcspi1_fck@a00ti,wait-gate-clockJ ]uart2_fck@a00ti,wait-gate-clockJ ]uart1_fck@a00ti,wait-gate-clockJ  ]core_12m_fckfixed-factor-clockKLW]Lhdq_fck@a00ti,wait-gate-clockL ]core_l3_ickfixed-factor-clockBLW]Msdrc_ick@a10ti,wait-gate-clockM ]gpmc_fckfixed-factor-clockMLWcore_l4_ickfixed-factor-clockCLW]Nmmchs2_ick@a10ti,omap3-interface-clockN ]mmchs1_ick@a10ti,omap3-interface-clockN ]hdq_ick@a10ti,omap3-interface-clockN ]mcspi4_ick@a10ti,omap3-interface-clockN ]mcspi3_ick@a10ti,omap3-interface-clockN ]mcspi2_ick@a10ti,omap3-interface-clockN ]mcspi1_ick@a10ti,omap3-interface-clockN ]i2c3_ick@a10ti,omap3-interface-clockN ]i2c2_ick@a10ti,omap3-interface-clockN ]i2c1_ick@a10ti,omap3-interface-clockN ]uart2_ick@a10ti,omap3-interface-clockN ]uart1_ick@a10ti,omap3-interface-clockN  ]gpt11_ick@a10ti,omap3-interface-clockN  ]gpt10_ick@a10ti,omap3-interface-clockN  ]mcbsp5_ick@a10ti,omap3-interface-clockN  ]mcbsp1_ick@a10ti,omap3-interface-clockN  ]omapctrl_ick@a10ti,omap3-interface-clockN ]dss_tv_fck@e00ti,gate-clock<]dss_96m_fck@e00ti,gate-clockI]dss2_alwon_fck@e00ti,gate-clock"]dummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock" ]Ogpt1_mux_fck@c40ti,composite-mux-clockD" @]Pgpt1_fckti,composite-clockOP]aes2_ick@a10ti,omap3-interface-clockN ]wkup_32k_fckfixed-factor-clockDLW]Qgpio1_dbck@c00ti,gate-clockQ ]sha12_ick@a10ti,omap3-interface-clockN ]wdt2_fck@c00ti,wait-gate-clockQ ]wdt2_ick@c10ti,omap3-interface-clockR ]wdt1_ick@c10ti,omap3-interface-clockR ]gpio1_ick@c10ti,omap3-interface-clockR ]omap_32ksync_ick@c10ti,omap3-interface-clockR ]gpt12_ick@c10ti,omap3-interface-clockR ]gpt1_ick@c10ti,omap3-interface-clockR ]per_96m_fckfixed-factor-clock-LW] per_48m_fckfixed-factor-clock4LW]Suart3_fck@1000ti,wait-gate-clockS ]gpt2_gate_fck@1000ti,composite-gate-clock"]Tgpt2_mux_fck@1040ti,composite-mux-clockD"@]Ugpt2_fckti,composite-clockTU]gpt3_gate_fck@1000ti,composite-gate-clock"]Vgpt3_mux_fck@1040ti,composite-mux-clockD"@]Wgpt3_fckti,composite-clockVWgpt4_gate_fck@1000ti,composite-gate-clock"]Xgpt4_mux_fck@1040ti,composite-mux-clockD"@]Ygpt4_fckti,composite-clockXYgpt5_gate_fck@1000ti,composite-gate-clock"]Zgpt5_mux_fck@1040ti,composite-mux-clockD"@][gpt5_fckti,composite-clockZ[gpt6_gate_fck@1000ti,composite-gate-clock"]\gpt6_mux_fck@1040ti,composite-mux-clockD"@]]gpt6_fckti,composite-clock\]gpt7_gate_fck@1000ti,composite-gate-clock"]^gpt7_mux_fck@1040ti,composite-mux-clockD"@]_gpt7_fckti,composite-clock^_gpt8_gate_fck@1000ti,composite-gate-clock" ]`gpt8_mux_fck@1040ti,composite-mux-clockD"@]agpt8_fckti,composite-clock`agpt9_gate_fck@1000ti,composite-gate-clock" ]bgpt9_mux_fck@1040ti,composite-mux-clockD"@]cgpt9_fckti,composite-clockbcper_32k_alwon_fckfixed-factor-clockDLW]dgpio6_dbck@1000ti,gate-clockd]gpio5_dbck@1000ti,gate-clockd]gpio4_dbck@1000ti,gate-clockd]gpio3_dbck@1000ti,gate-clockd]gpio2_dbck@1000ti,gate-clockd ]wdt3_fck@1000ti,wait-gate-clockd ]per_l4_ickfixed-factor-clockCLW]egpio6_ick@1010ti,omap3-interface-clocke]gpio5_ick@1010ti,omap3-interface-clocke]gpio4_ick@1010ti,omap3-interface-clocke]gpio3_ick@1010ti,omap3-interface-clocke]gpio2_ick@1010ti,omap3-interface-clocke ]wdt3_ick@1010ti,omap3-interface-clocke ]uart3_ick@1010ti,omap3-interface-clocke ]uart4_ick@1010ti,omap3-interface-clocke]gpt9_ick@1010ti,omap3-interface-clocke ]gpt8_ick@1010ti,omap3-interface-clocke ]gpt7_ick@1010ti,omap3-interface-clocke]gpt6_ick@1010ti,omap3-interface-clocke]gpt5_ick@1010ti,omap3-interface-clocke]gpt4_ick@1010ti,omap3-interface-clocke]gpt3_ick@1010ti,omap3-interface-clocke]gpt2_ick@1010ti,omap3-interface-clocke]mcbsp2_ick@1010ti,omap3-interface-clocke]mcbsp3_ick@1010ti,omap3-interface-clocke]mcbsp4_ick@1010ti,omap3-interface-clocke]mcbsp2_gate_fck@1000ti,composite-gate-clock]mcbsp3_gate_fck@1000ti,composite-gate-clock]mcbsp4_gate_fck@1000ti,composite-gate-clock]emu_src_mux_ck@1140 ti,mux-clock"fgh@]iemu_src_ckti,clkdm-gate-clocki]jpclk_fck@1140ti,divider-clockj*@5pclkx2_fck@1140ti,divider-clockj*@5atclk_fck@1140ti,divider-clockj*@5traceclk_src_fck@1140 ti,mux-clock"fgh@]ktraceclk_fck@1140ti,divider-clockk *@5secure_32k_fck fixed-clock]lgpt12_fckfixed-factor-clocklLW]wdt1_fckfixed-factor-clocklLWsecurity_l4_ick2fixed-factor-clockCLW]maes1_ick@a14ti,omap3-interface-clockm ]rng_ick@a14ti,omap3-interface-clockm ]sha11_ick@a14ti,omap3-interface-clockm des1_ick@a14ti,omap3-interface-clockm cam_mclk@f00ti,gate-clockncam_ick@f10!ti,omap3-no-wait-interface-clockC]csi2_96m_fck@f00ti,gate-clock]security_l3_ickfixed-factor-clockBLW]opka_ick@a14ti,omap3-interface-clocko icr_ick@a10ti,omap3-interface-clockN des2_ick@a10ti,omap3-interface-clockN mspro_ick@a10ti,omap3-interface-clockN mailboxes_ick@a10ti,omap3-interface-clockN ssi_l4_ickfixed-factor-clockCLW]vsr1_fck@c00ti,wait-gate-clock" ]sr2_fck@c00ti,wait-gate-clock" ]sr_l4_ickfixed-factor-clockCLWdpll2_fck@40ti,divider-clock**@5]pdpll2_ck@4ti,omap3-dpll-clock"p$@4]qdpll2_m2_ck@44ti,divider-clockq*D5]riva2_ck@0ti,wait-gate-clockr]modem_fck@a00ti,omap3-interface-clock" ]sad2d_ick@a10ti,omap3-interface-clockB ]mad2d_ick@a18ti,omap3-interface-clockB ]mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock# ]sssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock# @$]tssi_ssr_fck_3430es2ti,composite-clockst]ussi_sst_fck_3430es2fixed-factor-clockuLW]hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockM ]ssi_ick_3430es2@a10ti,omap3-ssi-interface-clockv ]usim_gate_fck@c00ti,composite-gate-clockI  ]sys_d2_ckfixed-factor-clock"LW]xomap_96m_d2_fckfixed-factor-clockILW]yomap_96m_d4_fckfixed-factor-clockILW]zomap_96m_d8_fckfixed-factor-clockILW]{omap_96m_d10_fckfixed-factor-clockILW ]|dpll5_m2_d4_ckfixed-factor-clockwLW]}dpll5_m2_d8_ckfixed-factor-clockwLW]~dpll5_m2_d16_ckfixed-factor-clockwLW]dpll5_m2_d20_ckfixed-factor-clockwLW]usim_mux_fck@c40ti,composite-mux-clock("xyz{|}~ @5]usim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockR  ]dpll5_ck@d04ti,omap3-dpll-clock""  $ L 4]dpll5_m2_ck@d50ti,divider-clock* P5]wsgx_gate_fck@b00ti,composite-gate-clock* ]core_d3_ckfixed-factor-clock*LW]core_d4_ckfixed-factor-clock*LW]core_d6_ckfixed-factor-clock*LW]omap_192m_alwon_fckfixed-factor-clock&LW]core_d2_ckfixed-factor-clock*LW]sgx_mux_fck@b40ti,composite-mux-clock . @]sgx_fckti,composite-clock]sgx_ick@b10ti,wait-gate-clockB ]cpefuse_fck@a08ti,gate-clock" ]ts_fck@a08ti,gate-clockD ]usbtll_fck@a08ti,wait-gate-clockw ]usbtll_ick@a18ti,omap3-interface-clockN ]mmchs3_ick@a10ti,omap3-interface-clockN ]mmchs3_fck@a00ti,wait-gate-clock ]dss1_alwon_fck_3430es2@e00ti,dss-gate-clock]dss_ick_3430es2@e10ti,omap3-dss-interface-clockC]usbhost_120m_fck@1400ti,gate-clockw]usbhost_48m_fck@1400ti,dss-gate-clock4]usbhost_ick@1410ti,omap3-dss-interface-clockC]uart4_fck@1000ti,wait-gate-clockS]clockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainjdpll4_clkdmti,clockdomain wkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainqd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscQfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc H ]target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#  Mick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma  `]gpio@48310000ti,omap3-gpioH1gpio1(:J ]gpio@49050000ti,omap3-gpioIgpio2:J gpio@49052000ti,omap3-gpioI gpio3:J ]gpio@49054000ti,omap3-gpioI@ gpio4:J ]gpio@49056000ti,omap3-gpioI`!gpio5:J ]gpio@49058000ti,omap3-gpioI"gpio6:J ]serial@4806a000ti,omap3-uartH VH 12txrxuart1lserial@4806c000ti,omap3-uartHVI 34txrxuart2lserial@49020000ti,omap3-uartIVJn 56txrxuart3ljdefaultxi2c@48070000 ti,omap3-i2cH8 txrx+i2c1'@twl@48H fck ti,twl4030 jdefaultxpowerti,twl4030-power-resetaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  vac0watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1--]regulator-vaux2ti,twl4030-vaux2w@w@]regulator-vaux3ti,twl4030-vaux3**regulator-vaux4ti,twl4030-vaux4**]regulator-vdd1ti,twl4030-vdd1 ' ]regulator-vdacti,twl4030-vdacw@w@] regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0]regulator-vmmc2ti,twl4030-vmmc2:0]regulator-vusb1v5ti,twl4030-vusb1v5]regulator-vusb1v8ti,twl4030-vusb1v8]regulator-vusb3v1ti,twl4030-vusb3v1]regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@] regulator-vsimti,twl4030-vsim**gpioti,twl4030-gpio:J ]twl4030-usbti,twl4030-usb  &/] pwmti,twl4030-pwm:pwmledti,twl4030-pwmled:pwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadEUh  $12 #09"/!. -%,&*madcti,twl4030-madcu]i2c@48072000 ti,omap3-i2cH 9 txrx+i2c2i2c@48060000 ti,omap3-i2cH= txrx+i2c3bq27500@55 ti,bq27500Umailbox@48094000ti,omap3-mailboxmailboxH @dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@ #$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3tsc2046@0 ti,tsc2046B@jdefaultx  @ )(9Ilcd@1tpo,td043mtea1W`ilcd oportendpoint{]spi@4809a000ti,omap2-mcspiH B+mcspi2  +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3  tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4 FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1 =>txrxjdefaultx mmc@480b4000ti,omap3-hsmmcH @Vmmc2 /0txrxjdefaultx mmc@480ad000ti,omap3-hsmmcH ^mmc3 MNtxrxjdefaultx+wifi@1 ti,wl1251 mmu@480bd400 ti,omap2-iommuH mmu_isp]mmu@5d000000 ti,omap2-iommu]mmu_iva (disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< /commontxrx?mcbsp1  txrxfck (disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?/commontxrxsidetone?mcbsp2mcbsp2_sidetone !"txrxfckick (disabledmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZ/commontxrxsidetone?mcbsp3mcbsp3_sidetone txrxfckick (disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 /commontxrx?mcbsp4 txrxfckN (disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR /commontxrx?mcbsp5 txrxfck (disabledsham@480c3000ti,omap3-shamshamH 0d1 Erxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' fckick+ H1_stimer@0ti,omap3430-timerfck%~Dtarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' fckick+ H0@timer@0ti,omap3430-timer_~usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcn rxtx+ :J0] nand@0,0ti,omap2-nand   $3swCTb,t,",(6@RR (4+x-loader@0ixloaderbootloaders@80000iubootbootloaders_env@260000 iuboot-env&kernel@280000iboot(filesystem@c80000irootfsusb_otg_hs@480ab000ti,omap3-musbH \]/mcdma usb_otg_hsFQY bq   yusb2-phy*2dss@48050000 ti,omap3-dssH(ok dss_corefck+jdefaultx  dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll (disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH (disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH (ok dss_vencfcktv_dac_clk portendpoint{]portendpoint{]ssi-controller@48058000 ti,omap3-ssissi(okHHsysgddG/gdd_mpu+ u ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI P QRtxrxuart4lregulator-abb-mpu ti,abb-v1 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heartbeat offled4ipandora::wifi u mmc2 offgpio-keys gpio-keysjdefaultxup-buttoniup g uIdown-buttonidown l uIleft-buttonileft i uIright-buttoniright j uIpageup-buttonigame 1 h u Ipagedown-buttonigame 3 m u Ihome-buttonigame 4 f uIend-buttonigame 2 k uIright-shiftil 6 uIkp-plusil2 N uIright-ctrlir a u Ikp-minusir2 J u Ileft-ctrlictrl  uImenuimenu  uIholdihold  uIleft-altialt 8 uIlidilid   u hsusb2_phyusb-nop-xceiv o/]fixed-regulator-usb_host_5vregulator-fixed usb_host_5vLK@LK@   fixed-regulator-wg7210_enregulator-fixedvwlanw@w@ )P  ]fixed-regulator-wg7210_32kregulator-fixed wg7210_32kw@w@    compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3display0device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supplycpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskphandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0ti,use_poweroffti,ramp_delay_valuebci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencypendown-gpiovcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxwakeup-sourcespi-cpolspi-cphalabelreset-gpiosremote-endpointti,dual-voltpbias-supplyvmmc-supplybus-widthcd-gpiosnon-removableti,non-removablecap-power-off-cardti,wl1251-has-eeprom#iommu-cellsti,#tlb-entriesstatusinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda-supplyti,channelsdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorslinux,default-triggerdefault-statelinux,codelinux,input-typeregulator-boot-onenable-active-highstartup-delay-us