(H%0(Z$FVP Base RevCarm,fvp-base-revcarm,vexpress"1smb@8000000 simple-bus"1x= D U?Th            !!""##$$%%&&''(())**++,,motherboardvrs2arm,vexpress,v2m-p1simple-bus"1D=flash@0,00000000arm,vexpress-flashcfi-flashethernet@2,02000000smsc,lan91c111 clk24mhz fixed-clockn6 v2m:clk24mhzrefclk1mhz fixed-clockB@v2m:refclk1mhzrefclk32khz fixed-clockv2m:refclk32khziofpga@3,00000000 simple-bus"1= sysreg@10000arm,vexpress-sysregsysctl@20000arm,sp810arm,primecell refclktimclkapb_pclk0timerclken0timerclken1timerclken2timerclken3  aaci@40000arm,pl041arm,primecell  apb_pclkmmci@50000arm,pl180arm,primecell  1 :CQmclkapb_pclkkmi@60000arm,pl050arm,primecell KMIREFCLKapb_pclkkmi@70000arm,pl050arm,primecell KMIREFCLKapb_pclkuart@90000arm,pl011arm,primecell uartclkapb_pclkuart@a0000arm,pl011arm,primecell uartclkapb_pclkuart@b0000arm,pl011arm,primecell uartclkapb_pclkuart@c0000arm,pl011arm,primecell uartclkapb_pclkwdt@f0000arm,sp805arm,primecellwdogclkapb_pclktimer@110000arm,sp804arm,primecelltimclken1timclken2apb_pclktimer@120000arm,sp804arm,primecelltimclken1timclken2apb_pclkvirtio-block@130000 virtio,mmio*rtc@170000arm,pl031arm,primecell apb_pclkclcd@1f0000arm,pl111arm,primecell ]combinedclcdclkapb_pclkm portendpoint   virtio-p9@140000 virtio,mmio+virtio-net@150000 virtio,mmio,v2m-3v3regulator-fixed3V32Z2Zmccarm,vexpress,config-bus oscclk1arm,vexpress-osc(Ajep v2m:oscclk1resetarm,vexpress-reset(muxfpgaarm,vexpress-muxfpga(shutdownarm,vexpress-shutdown(rebootarm,vexpress-reboot( dvimodearm,vexpress-dvimode( chosenaliases6L/smb@8000000/motherboard/iofpga@3,00000000/uart@900006T/smb@8000000/motherboard/iofpga@3,00000000/uart@a00006\/smb@8000000/motherboard/iofpga@3,00000000/uart@b00006d/smb@8000000/motherboard/iofpga@3,00000000/uart@c0000psci arm,psci-0.2lsmccpus"1cpu@0scpu arm,armv8pscicpu@100scpu arm,armv8pscicpu@200scpu arm,armv8pscicpu@300scpu arm,armv8pscicpu@10000scpu arm,armv8pscicpu@10100scpu arm,armv8pscicpu@10200scpu arm,armv8pscicpu@10300scpu arm,armv8pscimemory@80000000smemory reserved-memory"1=vram@18000000shared-dma-pool interrupt-controller@2f000000 arm,gic-v3D"1=P// , , ,   its@2f020000arm,gic-v3-its/ timerarm,armv8-timer0   pmuarm,armv8-pmuv3 spe-pmu'arm,statistical-profiling-extension-v1 pci@40000000"1Dpci-host-ecam-genericspci@=PPhU  smmu@2b400000 arm,smmu-v3+@0JKMO]eventqpriqcmdq-syncgerror  panelarm,rtsm-displaypanel-dpiportendpoint  panel-timing_ 0%h/7CP modelcompatibleinterrupt-parent#address-cells#size-cellsranges#interrupt-cellsinterrupt-map-maskinterrupt-maparm,v2m-memory-mapregbank-widthinterrupts#clock-cellsclock-frequencyclock-output-namesphandlegpio-controller#gpio-cellsclocksclock-namesassigned-clocksassigned-clock-parentscd-gpioswp-gpiosmax-frequencyvmmc-supplyinterrupt-namesmax-memory-bandwidthmemory-regionremote-endpointarm,pl11x,tft-r0g0b0-padsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onarm,vexpress,config-bridgearm,vexpress-sysreg,funcfreq-rangeserial0serial1serial2serial3methoddevice_typeenable-methodno-mapinterrupt-controller#msi-cellsmsi-controllerbus-rangemsi-mapiommu-mapdma-coherent#iommu-cellsmsi-parenthactivehback-porchhfront-porchhsync-lenvactivevback-porchvfront-porchvsync-len