� ��!aH8()��RTSM_VE_AEMv8A arm,rtsm_ve,aemv8aarm,vexpress"1smb@8000000 simple-bus"1x= D U?�h            !!""##$$%%&&''(())**motherboardvrs1arm,vexpress,v2m-p1simple-bus"1D=flash@0,00000000arm,vexpress-flashcfi-flash��vram@2,00000000arm,vexpress-vram ��� ethernet@2,02000000smsc,lan91c111 ��clk24mhz fixed-clock��n6 �v2m:clk24mhz�refclk1mhz fixed-clock��B@�v2m:refclk1mhz�refclk32khz fixed-clock����v2m:refclk32khz�iofpga@3,00000000 simple-bus"1= sysreg@10000arm,vexpress-sysreg����sysctl@20000arm,sp810arm,primecell� ��refclktimclkapb_pclk�0�timerclken0timerclken1timerclken2timerclken3  �aaci@40000arm,pl041arm,primecell�� � �apb_pclkmmci@50000arm,pl180arm,primecell��  1 :C�Q��mclkapb_pclkkmi@60000arm,pl050arm,primecell�� ��KMIREFCLKapb_pclkkmi@70000arm,pl050arm,primecell�� ��KMIREFCLKapb_pclkuart@90000arm,pl011arm,primecell� ���uartclkapb_pclkuart@a0000arm,pl011arm,primecell� ���uartclkapb_pclkuart@b0000arm,pl011arm,primecell� ���uartclkapb_pclkuart@c0000arm,pl011arm,primecell� ���uartclkapb_pclkwdt@f0000arm,sp805arm,primecell����wdogclkapb_pclktimer@110000arm,sp804arm,primecell����timclken1timclken2apb_pclktimer@120000arm,sp804arm,primecell����timclken1timclken2apb_pclkrtc@170000arm,pl031arm,primecell��� �apb_pclkclcd@1f0000arm,pl111arm,primecell� ]combined���clcdclkapb_pclkm� ����portendpoint�  �� panel panel-dpiportendpoint� � panel-timing���_����0�h�virtio-block@130000 virtio,mmio��*v2m-3v3regulator-fixed&3V352Z�M2Z�e�mccarm,vexpress,config-busyoscclk1arm,vexpress-osc��jep���� �v2m:oscclk1�resetarm,vexpress-reset�muxfpgaarm,vexpress-muxfpga�shutdownarm,vexpress-shutdown�rebootarm,vexpress-reboot� dvimodearm,vexpress-dvimode� chosenaliases6�/smb@8000000/motherboard/iofpga@3,00000000/uart@900006�/smb@8000000/motherboard/iofpga@3,00000000/uart@a00006�/smb@8000000/motherboard/iofpga@3,00000000/uart@b00006�/smb@8000000/motherboard/iofpga@3,00000000/uart@c0000cpus"1cpu@0�cpu arm,armv8� �spin-table���� cpu@1�cpu arm,armv8� �spin-table���� cpu@2�cpu arm,armv8� �spin-table���� cpu@3�cpu arm,armv8� �spin-table���� l2-cache0cache� memory@80000000�memory �����interrupt-controller@2c001000%arm,cortex-a15-gicarm,cortex-a9-gicD"@�,, ,@ ,`  � �timerarm,armv8-timer0�   ���pmuarm,armv8-pmuv30�<=>? modelcompatibleinterrupt-parent#address-cells#size-cellsranges#interrupt-cellsinterrupt-map-maskinterrupt-maparm,v2m-memory-mapregbank-widthphandleinterrupts#clock-cellsclock-frequencyclock-output-namesgpio-controller#gpio-cellsclocksclock-namesassigned-clocksassigned-clock-parentscd-gpioswp-gpiosmax-frequencyvmmc-supplyinterrupt-namesarm,pl11x,framebuffermemory-regionmax-memory-bandwidthremote-endpointarm,pl11x,tft-r0g0b0-padshactivehback-porchhfront-porchhsync-lenvactivevback-porchvfront-porchvsync-lenregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onarm,vexpress,config-bridgearm,vexpress-sysreg,funcfreq-rangeserial0serial1serial2serial3device_typeenable-methodcpu-release-addrnext-level-cacheinterrupt-controller