� ����8��(��� 5,Qualcomm Technologies, Inc. sc7280 IDP SKU1 platform)2qcom,sc7280-idpgoogle,senorqcom,sc7280chosen=serial0:115200n8aliases!I/soc@0/geniqup@9c0000/i2c@980000!N/soc@0/geniqup@9c0000/i2c@984000!S/soc@0/geniqup@9c0000/i2c@988000!X/soc@0/geniqup@9c0000/i2c@98c000!]/soc@0/geniqup@9c0000/i2c@990000!b/soc@0/geniqup@9c0000/i2c@994000!g/soc@0/geniqup@9c0000/i2c@998000!l/soc@0/geniqup@9c0000/i2c@99c000!q/soc@0/geniqup@ac0000/i2c@a80000!v/soc@0/geniqup@ac0000/i2c@a84000!{/soc@0/geniqup@ac0000/i2c@a88000!�/soc@0/geniqup@ac0000/i2c@a8c000!�/soc@0/geniqup@ac0000/i2c@a90000!�/soc@0/geniqup@ac0000/i2c@a94000!�/soc@0/geniqup@ac0000/i2c@a98000!�/soc@0/geniqup@ac0000/i2c@a9c000�/soc@0/mmc@7c4000�/soc@0/mmc@8804000!�/soc@0/geniqup@9c0000/spi@980000!�/soc@0/geniqup@9c0000/spi@984000!�/soc@0/geniqup@9c0000/spi@988000!�/soc@0/geniqup@9c0000/spi@98c000!�/soc@0/geniqup@9c0000/spi@990000!�/soc@0/geniqup@9c0000/spi@994000!�/soc@0/geniqup@9c0000/spi@998000!�/soc@0/geniqup@9c0000/spi@99c000!�/soc@0/geniqup@ac0000/spi@a80000!�/soc@0/geniqup@ac0000/spi@a84000!�/soc@0/geniqup@ac0000/spi@a88000!�/soc@0/geniqup@ac0000/spi@a8c000!�/soc@0/geniqup@ac0000/spi@a90000!�/soc@0/geniqup@ac0000/spi@a94000!�/soc@0/geniqup@ac0000/spi@a98000!�/soc@0/geniqup@ac0000/spi@a9c000.�/soc@0/geniqup@9c0000/serial@99c000/bluetooth$ /soc@0/geniqup@9c0000/serial@99c000$/soc@0/geniqup@9c0000/serial@994000clocksxo-board 2fixed-clock��*7Bsleep-clk 2fixed-clock}*7(reserved-memory ?memory@4cd000FML�7�memory@80800000M��Fmemory@80860000M�� 2qcom,cmd-dbFmemory@80900000M�� F7 memory@80b00000FM��memory@80c00000M���F7�memory@8b200000M� PF7+memory@8b700000M�pFmemory@9c9000002qcom,rmtfs-memM���FQ`memory@86700000M�p�Fmemory@8ad00000M��PFmemory@8b800000M��`F7�memory@9ae00000M���F7memory@9c700000M�p F7�cpus cpu@0jcpu 2arm,kryoMvpsci ���(� � �7l2-cache2cache� 7l3-cache2cache7 cpu@100jcpu 2arm,kryoMvpsci �� �(� � �7l2-cache2cache� 7 cpu@200jcpu 2arm,kryoMvpsci �� �(� � �7l2-cache2cache� 7 cpu@300jcpu 2arm,kryoMvpsci ���(� � �7l2-cache2cache� 7cpu@400jcpu 2arm,kryoMvpsci ���(� � �7l2-cache2cache� 7cpu@500jcpu 2arm,kryoMvpsci ���(� � �7l2-cache2cache� 7cpu@600jcpu 2arm,kryoMvpsci ���(� � �7l2-cache2cache� 7cpu@700jcpu 2arm,kryoMvpsci ���(� � �7l2-cache2cache� 7cpu-mapcluster0core0�core1�core2�core3�core4�core5�core6�core7�idle-states�pscicpu-sleep-0-02arm,idle-state�little-power-down@%0�@�Q7cpu-sleep-0-12arm,idle-state�little-rail-power-down@�0�@�Q7cpu-sleep-1-02arm,idle-state�big-power-down@ 0�@�Q7cpu-sleep-1-12arm,idle-state�big-rail-power-down@0>@�Q7cluster-sleep-02arm,idle-state�cluster-power-down@4D �0�@&�Q7opp-table-cpu02operating-points-v2b7opp-300000000m�t 5�|opp-691200000m)2�t 5�opp-806400000m0�t 5>�opp-940800000m8xt��wopp-1152000000mD� t!b���opp-1324800000mN��t!b��opp-1516800000mZh�t.�E@opp-1651200000mbkPt.�}�opp-1804800000mk�t>��opp-1958400000mt��t>��opp-2016000000mx)�t^���opp-table-cpu42operating-points-v2b7opp-691200000m)2�t���|opp-940800000m8xt!b��opp-1228800000mI>t>�wopp-1344000000mP�t>�wopp-1516800000mZh�t>�wopp-1651200000mbkPt^��E@opp-1900800000mqK�t^���`opp-2054400000mzs�t^���`opp-2112000000m}�t^���`opp-2131200000m�t^���`opp-2208000000m��ht^���`opp-2400000000m� t�0 �opp-2611200000m���t�0 �opp-table-cpu72operating-points-v2b7opp-806400000m0�t���|opp-1056000000m>�Ht!b��opp-1324800000mN��t>�wopp-1516800000mZh�t>�wopp-1766400000miI t^��E@opp-1862400000mo�t^��E@opp-2035200000myN�t^��E@opp-2112000000m}�t^���`opp-2208000000m��ht^���`opp-2380800000m�� th?��`opp-2400000000m� t�0 �opp-2515200000m���t�0 �opp-2707200000m�\�t�0 �opp-3014400000m��t�0 �memory@80000000jmemoryM�firmwarescm2qcom,scm-sc7280qcom,scminterconnect2qcom,sc7280-clk-virt��7<smem 2qcom,smem� �!smp2p-adsp 2qcom,smp2p����" �"��master-kernelmaster-kernelslave-kernel slave-kernel'<smp2p-cdsp 2qcom,smp2p�^��" �"��master-kernelmaster-kernelslave-kernel slave-kernel'<smp2p-mpss 2qcom,smp2p����" �"��master-kernelmaster-kernel7�slave-kernel slave-kernel'<7�ipa-ap-to-modemipa7�ipa-modem-to-apipa'<7�smp2p-wpss 2qcom,smp2p�ih�" �"�� master-kernelmaster-kernel7 slave-kernel slave-kernel'<7pmu2arm,armv8-pmuv3 Mpsci 2arm,psci-1.0}smcopp-table-qspi2operating-points-v27opp-75000000mxh�X#opp-150000000m�рX$opp-200000000m ��X%opp-300000000m�X&opp-table-qup2operating-points-v27@opp-75000000mxh�X#opp-100000000m��X$opp-128000000m� X&soc@0 ?f 2simple-busclock-controller@1000002qcom,gcc-sc7280M,q''()�xbi_tcxobi_tcxo_aosleep_clkpcie_0_pipe_clkpcie_1_pipe_clkufs_phy_rx_symbol_0_clkufs_phy_rx_symbol_1_clkufs_phy_tx_symbol_0_clkusb3_phy_wrapper_gcc_usb30_pipe_clk*���*7+mailbox@4080002qcom,sc7280-ipccqcom,ipccM@� M�'<�7"efuse@7840002qcom,sc7280-qfpromqcom,qfprom@Mx@ x x  x`�q+�xcore�* �,gpu_speed_bin@1e9M��7�mmc@7c4000$2qcom,sc7280-sdhciqcom,sdhci-msm-v5�defaultsleep�-./0�1234�okay M|@|P �hccqhci 5�M�� hc_irqpwr_irqq+l+m'xifacecorexo0�67sdhc-ddrcpu-sdhc�*�8,6Cd,S�hcp��+����9�:opp-table2operating-points-v278opp-100000000m��X#tw@����opp-384000000m�`X&tRe�j��pdma-controller@900000�2qcom,sc7280-gpi-dmaM��M�������������   56�okay7=geniqup@9c00002qcom,geni-se-qupM� q+h+i xm-ahbs-ahb ? 5#�okayi2c@9800002qcom,geni-i2cM�@q+Fxse�default�; MY H�<<76qup-corequp-configqup-memory ==txrx �disabledspi@9800002qcom,geni-spiM�@q+Fxse�default�>? MY �*�@0�<<7qup-corequp-config ==txrx �disabledserial@9800002qcom,geni-uartM�@q+Fxse�default�ABCD MY�*�@0�<<7qup-corequp-config �disabledi2c@9840002qcom,geni-i2cM�@@q+Hxse�default�E MZ H�<<76qup-corequp-configqup-memory ==txrx �disabledspi@9840002qcom,geni-spiM�@@q+Hxse�default�FG MZ �*�@0�<<7qup-corequp-config ==txrx �disabledserial@9840002qcom,geni-uartM�@@q+Hxse�default�HIJK MZ�*�@0�<<7qup-corequp-config �disabledi2c@9880002qcom,geni-i2cM��@q+Jxse�default�L M[ H�<<76qup-corequp-configqup-memory ==txrx �disabledspi@9880002qcom,geni-spiM��@q+Jxse�default�MN M[ �*�@0�<<7qup-corequp-config ==txrx �disabledserial@9880002qcom,geni-uartM��@q+Jxse�default�OPQR M[�*�@0�<<7qup-corequp-config �disabledi2c@98c0002qcom,geni-i2cM��@q+Lxse�default�S M\ H�<<76qup-corequp-configqup-memory ==txrx �disabledspi@98c0002qcom,geni-spiM��@q+Lxse�default�TU M\ �*�@0�<<7qup-corequp-config ==txrx �disabledserial@98c0002qcom,geni-uartM��@q+Lxse�default�VWXY M\�*�@0�<<7qup-corequp-config �disabledi2c@9900002qcom,geni-i2cM�@q+Nxse�default�Z M] H�<<76qup-corequp-configqup-memory ==txrx �disabledspi@9900002qcom,geni-spiM�@q+Nxse�default�[\ M] �*�@0�<<7qup-corequp-config ==txrx �disabledserial@9900002qcom,geni-uartM�@q+Nxse�default�]^_` M]�*�@0�<<7qup-corequp-config �disabledi2c@9940002qcom,geni-i2cM�@@q+Pxse�default�a M^ H�<<76qup-corequp-configqup-memory ==txrx �disabledspi@9940002qcom,geni-spiM�@@q+Pxse�default�bc M^ �*�@0�<<7qup-corequp-config ==txrx �disabledserial@9940002qcom,geni-debug-uartM�@@q+Pxse�default�defg M^�*�@0�<<7qup-corequp-config�okayi2c@9980002qcom,geni-i2cM��@q+Rxse�default�h M_ H�<<76qup-corequp-configqup-memory ==txrx �disabledspi@9980002qcom,geni-spiM��@q+Rxse�default�ij M_ �*�@0�<<7qup-corequp-config ==txrx �disabledserial@9980002qcom,geni-uartM��@q+Rxse�default�klmn M_�*�@0�<<7qup-corequp-config �disabledi2c@99c0002qcom,geni-i2cM��@q+Txse�default�o M` H�<<76qup-corequp-configqup-memory ==txrx �disabledspi@99c0002qcom,geni-spiM��@q+Txse�default�pq M` �*�@0�<<7qup-corequp-config ==txrx �disabledserial@99c0002qcom,geni-uartM��@q+Txse�defaultsleep�rstu�*�@0�<<7qup-corequp-config�okay�`v�wxyzbluetooth2qcom,wcn6750-bt�default�{| )vU 6vVC}Q}b}s}�~������0��:dma-controller@a00000�2qcom,sc7280-gpi-dmaM��M%&'()*�   5V�okay7�geniqup@ac00002qcom,geni-se-qupM� q+j+k xm-ahbs-ahb ? 5C�okayi2c@a800002qcom,geni-i2cM�@q+Xxse�default�� Ma H�<<7�qup-corequp-configqup-memory ��txrx �disabledspi@a800002qcom,geni-spiM�@q+Xxse�default��� Ma �*�@0�<<7qup-corequp-config ��txrx �disabledserial@a800002qcom,geni-uartM�@q+Xxse�default����� Ma�*�@0�<<7qup-corequp-config �disabledi2c@a840002qcom,geni-i2cM�@@q+Zxse�default�� Mb H�<<7�qup-corequp-configqup-memory ��txrx �disabledspi@a840002qcom,geni-spiM�@@q+Zxse�default��� Mb �*�@0�<<7qup-corequp-config ��txrx �disabledserial@a840002qcom,geni-uartM�@@q+Zxse�default����� Mb�*�@0�<<7qup-corequp-config �disabledi2c@a880002qcom,geni-i2cM��@q+\xse�default�� Mc H�<<7�qup-corequp-configqup-memory ��txrx �disabledspi@a880002qcom,geni-spiM��@q+\xse�default��� Mc �*�@0�<<7qup-corequp-config ��txrx �disabledserial@a880002qcom,geni-uartM��@q+\xse�default����� Mc�*�@0�<<7qup-corequp-config �disabledi2c@a8c0002qcom,geni-i2cM��@q+^xse�default�� Md H�<<7�qup-corequp-configqup-memory ��txrx �disabledspi@a8c0002qcom,geni-spiM��@q+^xse�default��� Md �*�@0�<<7qup-corequp-config ��txrx �disabledserial@a8c0002qcom,geni-uartM��@q+^xse�default����� Md�*�@0�<<7qup-corequp-config �disabledi2c@a900002qcom,geni-i2cM�@q+`xse�default�� Me H�<<7�qup-corequp-configqup-memory ��txrx �disabledspi@a900002qcom,geni-spiM�@q+`xse�default��� Me �*�@0�<<7qup-corequp-config ��txrx �disabledserial@a900002qcom,geni-uartM�@q+`xse�default����� Me�*�@0�<<7qup-corequp-config �disabledi2c@a940002qcom,geni-i2cM�@@q+bxse�default�� Mf H�<<7�qup-corequp-configqup-memory ��txrx �disabledspi@a940002qcom,geni-spiM�@@q+bxse�default��� Mf �*�@0�<<7qup-corequp-config ��txrx �disabledserial@a940002qcom,geni-uartM�@@q+bxse�default����� Mf�*�@0�<<7qup-corequp-config �disabledi2c@a980002qcom,geni-i2cM��@q+dxse�default�� Mp H�<<7�qup-corequp-configqup-memory ��txrx �disabledspi@a980002qcom,geni-spiM��@q+dxse�default��� Mp �*�@0�<<7qup-corequp-config ��txrx �disabledserial@a980002qcom,geni-uartM��@q+dxse�default����� Mp�*�@0�<<7qup-corequp-config �disabledi2c@a9c0002qcom,geni-i2cM��@q+fxse�default�� Mq H�<<7�qup-corequp-configqup-memory ��txrx �disabledspi@a9c0002qcom,geni-spiM��@q+fxse�default��� Mq �*�@0�<<7qup-corequp-config ��txrx �disabledserial@a9c0002qcom,geni-uartM��@q+fxse�default����� Mq�*�@0�<<7qup-corequp-config �disabledinterconnect@1500000MP2qcom,sc7280-cnoc2��77interconnect@1502000MP 2qcom,sc7280-cnoc3��interconnect@1580000MX2qcom,sc7280-mc-virt��7interconnect@1680000MhT�2qcom,sc7280-system-noc��interconnect@16e00002qcom,sc7280-aggre1-nocMn����76interconnect@1700000Mp��2qcom,sc7280-aggre2-noc��7�interconnect@1740000Mt��2qcom,sc7280-mmss-noc��7*wifi@17a100402qcom,wcn6750-wifiM�@ 5�M     ������okaywifi-firmware 5pci@1c080002qcom,pcie-sc7280PM��0@@ �@@�parfdbielbiatuconfigjpci��� 8?@ @ @0@0� M3 msi< �����dq+7+8)'+2+4+5+9+:+�++�+axpipepipe_muxphy_piperefauxcfgbus_masterbus_slaveslave_q2atbuddrss_sf_tbuaggre0aggre1-+2=$��+Rpci�+^)cpciephy�default��� 5� m5�5��okay wv��phy@1c0e000 2qcom,sm8250-qmp-gen3x2-pcie-phyM��� ? q+2+4+�+(xauxcfg_ahbrefrefgen�+Rphy-+(=���okay����phy@1c0e200`M��p�������p�����q+7xpipe0�*�pcie_1_pipe_clk7)ipa@1e400002qcom,sc7280-ipa5�5�0M���J��@0�ipa-regipa-sharedgsi8�����( ipagsiipa-clock-queryipa-setup-readyq' xcore0��7memoryconfig�����*�ipa-clock-enabled-validipa-clock-enabled�okayhwlock@1f400002qcom,tcsr-mutexM� 7!syscon@1f600002qcom,sc7280-tcsrsysconM�7�syscon@1fc00002qcom,sc7280-tcsrsysconM�7�lpasscc@30000002qcom,sc7280-lpasscc M@�@�qdsp6sstop_ccq+�xiface*codec@32000002qcom,sc7280-lpass-rx-macroM �default���q���xmclknplfsgen��� macrodcodec*.�okay7�soundwire@32100002qcom,soundwire-v1.6.0M!  M�q�xiface?N��Rswr_audio_cgcr^��u?� � ��������������� ����. �okay7pcodec@0,42sdw20217010d00M.'7fcodec@32200002qcom,sc7280-lpass-tx-macroM"�default���q���xmclknplfsgen��� macrodcodec*.�okay7�soundwire@32300002qcom,soundwire-v1.6.0M# ����q�xiface?N��Rswr_audio_cgcru����������^������ ����<. �okay7qcodec@0,32sdw20217010d00M.M7gclock-controller@33000002qcom,sc7280-lpassaudiocc M0*�q'�&xbi_tcxolpass_aon_cc_main_rcg_clk_src��*��7�codec@33700002qcom,sc7280-lpass-va-macroM7�default���q�xmclk��� macrodcodec*.�okayb�7�clock-controller@33800002qcom,sc7280-lpassaonccM8q''�xbi_tcxobi_tcxo_aoiface*�7�clock-controller@39000002qcom,sc7280-lpasscoreccM�q'xbi_tcxo��*�7�audio@39870002qcom,sc7280-lpass-cpu`M�p���&�(�4�6�0e�lpass-hdmiiflpass-lpaiflpass-rxtx-cdc-dma-lpmlpass-rxtx-lpaiflpass-va-lpaiflpass-va-cdc-dma-lpm$5 5!52�*lcxX&Pq�� � ������� �xaon_cc_audio_hm_haudio_cc_ext_mclk0core_cc_sysnoc_mport_corecore_cc_ext_if0_ibitcore_cc_ext_if1_ibitaudio_cc_codec_memaudio_cc_codec_mem0audio_cc_codec_mem1audio_cc_codec_mem2aon_cc_va_mem0. 0M� ��? lpass-irq-lpaiflpass-irq-hdmilpass-irq-vaiflpass-irq-rxtxif�okay�default ����7ldai-link@1Mrdai-link@5Mdai-link@6Mdai-link@19Mdai-link@25Mclock-controller@3c000002qcom,sc7280-lpasshmM�(q'xbi_tcxo*�7�interconnect@3c40000M���2qcom,sc7280-lpass-ag-noc��pinctrl@33c00002qcom,sc7280-lpass-lpi-pinctrl M<U�����*7�dmic01-clk�gpio6 �dmic1_clk��7�dmic01-clk-sleep�gpio6 �dmic1_clk�dmic01-data�gpio7 �dmic1_data�7�dmic01-data-sleep�gpio7 �dmic1_datadmic23-clk�gpio8 �dmic2_clk��dmic23-clk-sleep�gpio8 �dmic2_clk�dmic23-data�gpio9 �dmic2_data�dmic23-data-sleep�gpio9 �dmic2_datarx-swr-clk�gpio3 �swr_rx_clk� �7�rx-swr-clk-sleep�gpio3 �swr_rx_clk�rx-swr-data �gpio4gpio5 �swr_rx_data�  7�rx-swr-data-sleep �gpio4gpio5 �swr_rx_data�tx-swr-clk�gpio0 �swr_tx_clk� �7�tx-swr-clk-sleep�gpio0 �swr_tx_clk�tx-swr-data�gpio1gpio2gpio14 �swr_tx_data�  7�tx-swr-data-sleep�gpio1gpio2gpio14 �swr_tx_datagpu@3d000002qcom,adreno-635.0qcom,adreno0M����#�kgsl_3d0_reg_memorycx_memcx_dbgc M, ��� ��gfx-mem� !� -speed_bin7^opp-table2operating-points-v27�opp-315000000mƄ� >@t�� Hopp-450000000m�t� >�t>� Hopp-550000000-0m �U� >�t�� Hopp-550000000-1m �U� >�th?� Hopp-608000000m$=X >�t�� Hopp-700000000m)�' >t�0  Hopp-812000000m0f# >@t�0  Hopp-840000000m2b >�t�0  Hopp-900000000m5�� >�t�0  Hgmu@3d6a000&2qcom,adreno-gmu-635.0qcom,adreno-gmu0M֠@� )�gmursccgmu_pdcM01 hfigmu8q��++%��� %xgmucxoaximemnocahbhubsmmu_vote���cxgx ���7�opp-table2operating-points-v27�opp-200000000m �� >0clock-controller@3d900002qcom,sc7280-gpuccM��q'+"+#8xbi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_src*��7�iommu@3da000022qcom,sc7280-smmu-500qcom,adreno-smmuarm,mmu-500M� Y f�M������������8q+%+&�� ��� �xgcc_gpu_memnoc_gfx_clkgcc_gpu_snoc_dvm_gfx_clkgpu_cc_ahb_clkgpu_cc_hlos1_vote_gpu_smmu_clkgpu_cc_cx_gmu_clkgpu_cc_hub_cx_int_clkgpu_cc_hub_aon_clk��7�remoteproc@40800002qcom,sc7280-mss-pil MH �qdsp6rmbL������0 wdogfatalreadyhandoverstop-ackshutdown-ack(q+�+�+�''xifaceofflinesnoc_axipkaxo�**cxmss��������stop��� Rmss_restartpdc_reset y�0P�0 ���`` ��000@0 �okay5$5��L �qcom/sc7280-herobrine/modem/mba.mbnqcom/sc7280-herobrine/modem/qdsp6sw.mbnglink-edge�" �" �modem�stm@6002000 2arm,coresight-stmarm,primecell M (�stm-basestm-stimulus-baseq� xapb_pclkout-portsportendpoint ��7�funnel@6041000+2arm,coresight-dynamic-funnelarm,primecellMq� xapb_pclkout-portsportendpoint ��7�in-ports port@7Mendpoint ��7�funnel@6042000+2arm,coresight-dynamic-funnelarm,primecellM q� xapb_pclkout-portsportendpoint ��7�in-ports port@4Mendpoint ��7 funnel@6045000+2arm,coresight-dynamic-funnelarm,primecellMPq� xapb_pclkout-portsportendpoint ��7�in-ports port@0Mendpoint ��7�port@1Mendpoint ��7�replicator@6046000/2arm,coresight-dynamic-replicatorarm,primecellM`q� xapb_pclkout-portsportendpoint ��7�in-portsportendpoint ��7�etr@6048000 2arm,coresight-tmcarm,primecellM� 5�q� xapb_pclk �in-portsportendpoint ��7�funnel@6b04000+2arm,coresight-dynamic-funnelarm,primecellM�@q� xapb_pclkout-portsportendpoint ��7�in-ports port@7Mendpoint ��7�etf@6b05000 2arm,coresight-tmcarm,primecellM�Pq� xapb_pclkout-portsportendpoint ��7�in-portsportendpoint ��7�replicator@6b06000/2arm,coresight-dynamic-replicatorarm,primecellM�`q� xapb_pclk �out-portsportendpoint ��7�in-portsportendpoint ��7�etm@7040000"2arm,coresight-etm4xarm,primecellM�q� xapb_pclk � "out-portsportendpoint ��7etm@7140000"2arm,coresight-etm4xarm,primecellM�q� xapb_pclk � "out-portsportendpoint ��7etm@7240000"2arm,coresight-etm4xarm,primecellM$�q� xapb_pclk � "out-portsportendpoint ��7etm@7340000"2arm,coresight-etm4xarm,primecellM4�q� xapb_pclk � "out-portsportendpoint ��7etm@7440000"2arm,coresight-etm4xarm,primecellMD�q� xapb_pclk � "out-portsportendpoint ��7etm@7540000"2arm,coresight-etm4xarm,primecellMT�q� xapb_pclk � "out-portsportendpoint ��7etm@7640000"2arm,coresight-etm4xarm,primecellMd�q� xapb_pclk � "out-portsportendpoint ��7etm@7740000"2arm,coresight-etm4xarm,primecellMt�q� xapb_pclk � "out-portsportendpoint �7 funnel@7800000+2arm,coresight-dynamic-funnelarm,primecellM�q� xapb_pclkout-portsportendpoint �7 in-ports port@0Mendpoint �7�port@1Mendpoint �7�port@2Mendpoint �7�port@3Mendpoint �7�port@4Mendpoint �7�port@5Mendpoint �7�port@6Mendpoint �7�port@7Mendpoint � 7funnel@7810000+2arm,coresight-dynamic-funnelarm,primecellM�q� xapb_pclkout-portsportendpoint � 7�in-portsportendpoint � 7mmc@8804000$2qcom,sc7280-sdhciqcom,sdhci-msm-v5�defaultsleep�  ��okayM�@ 5M�� hc_irqpwr_irqq+q+r'xifacecorexo0�67 sdhc-ddrcpu-sdhc�*�,Cd,�+�� 5v[opp-table2operating-points-v27opp-100000000m��X#tw@����opp-202000000m F�X&tRe�j� @phy@88e300002qcom,sc7280-usb-hs-phyqcom,usb-snps-hs-7nm-phyM�0�okay�q'xref�+�� > L,7&phy@88e400002qcom,sc7280-usb-hs-phyqcom,usb-snps-hs-7nm-phyM�@�okay�q'xref�+�� > L,7phy-wrapper@88e900082qcom,sc7280-qmp-usb3-dp-phyqcom,sm8250-qmp-usb3-dp-phy0M����@���okay ?q+�'+�xauxref_clk_srccom_aux�+ +  Rphycommon���usb3-phy@88e9200`M������������*�q+�xpipe0�usb3_phy_pipe_clk_src7'dp-phy@88ea200PM�����������*7.usb@8cf88002qcom,sc7280-dwc3qcom,dwc3Mψ�okay ?f(q++�+�+�+�#xcfg_noccoreifacesleepmock_utmi-+�+�=$� ��(��� � ' hs_phy_irqdp_hs_phy_irqdm_hs_phy_irq�+X&�+ 0�6 7&usb-ddrapps-usbusb@8c00000 2snps,dwc3M�� M� 5� Z s^ cusb2-phy �high-speed � �otgportendpoint �7#spi@88dc0002qcom,sc7280-qspiqcom,qspi-v1M��  MRq+�+� xifacecore�7 qspi-config�*��okay�default �flash@02jedec,spi-norM �<4` � �remoteproc@8a000002qcom,sc7280-wpss-pilM�L�K0 wdogfatalreadyhandoverstop-ackshutdown-ack q+�+�+�'xahb_bdgahbrscpxo�**cxmx���� �stop��� Rrestartpdc_sync y�p�okay �ath11k/WCN6750/hw1.0/wpss.mdt7�glink-edge�" �" �wpss� pmu@90910002qcom,sc7280-llcc-bwmonM  MQ��!opp-table2operating-points-v27!opp-0t 5opp-1t��opp-2t!b�opp-3t.�opp-4t>�opp-5t^��opp-6th?�opp-7t�0 pmu@90b6400)2qcom,sc7280-cpu-bwmonqcom,msm8998-bwmonM d ME��"opp-table2operating-points-v27"opp-0t$�opp-1tI>opp-2tq�opp-3t�|opp-4t��opp-5t�Ȁopp-6tAinterconnect@90e0000M P�2qcom,sc7280-dc-noc��interconnect@9100000M "2qcom,sc7280-gem-noc��7system-cache-controller@92000002qcom,sc7280-llcc M `�llcc_basellcc_broadcast_base MFeud@88e00002qcom,sc7280-eudqcom,eud M� �  �� portsport@0endpoint �#7port@1endpoint �$7%connector2usb-c-connectorportsport@0endpoint �%7$interconnect@a0c0000M 2qcom,sc7280-nsp-noc��usb@a6f88002qcom,sc7280-dwc3qcom,dwc3M o��okay ?f(q++�+ +�+�#xcfg_noccoreifacesleepmock_utmi-+�+�=$� ��4�����2 hs_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq�+X&�+ 0�6 7'usb-ddrapps-usb �usb@a600000 2snps,dwc3M `� M� 5� Z s^&'cusb2-phyusb3-phy �super-speed �hostvideo-codec@aa000002qcom,sc7280-venusM �  M�(q((( ((&xcorebusifacevcodec_corevcodec_bus�((*venusvcodec0cx�)0�7(*cpu-cfgvideo-mem5!� 5!� �+video-decoder2venus-decodervideo-encoder2venus-encodervideo-firmware 5!�opp-table2operating-points-v27)opp-133330000m�tPX#opp-240000000mNX$opp-335000000m���X%opp-424000000mE�X&opp-460000048mk 0X,clock-controller@aaf00002qcom,sc7280-videoccM �q''xbi_tcxobi_tcxo_ao*��7(clock-controller@ad000002qcom,sc7280-camccM �q''(xbi_tcxobi_tcxo_aosleep_clk*��clock-controller@af000002qcom,sc7280-dispccM �@q'+--..//�xbi_tcxogcc_disp_gpll0_clkdsi0_phy_pll_out_byteclkdsi0_phy_pll_out_dsiclkdp_phy_pll_link_clkdp_phy_pll_vco_div_clkedp_phy_pll_link_clkedp_phy_pll_vco_div_clk*��70display-subsystem@ae000002qcom,sc7280-mdssM ��mdss�0q+00xifaceahbcore MS'<�* mdp0-mem 5  ? �disabled72display-controller@ae010002qcom,sc7280-dpu M ��0 �  �mdpvbif0q++0000%!xbusnrt_busifacelutcorevsync-0%0=$�$��1�*2M �disabledports port@0Mendpoint �377port@1Mendpoint �47:port@2Mendpoint �57<opp-table2operating-points-v271opp-200000000m ��X#opp-300000000m�X$opp-380000000m�WX%opp-506666667m3�X&dsi@ae940002qcom,mdss-dsi-ctrlM �@ �dsi_ctrl2M0q00000+$xbytebyte_intfpixelcoreifacebus�6�*^-cdsi  �disabledports port@0Mendpoint �773port@1Mendpointopp-table2operating-points-v276opp-187500000m -�X#opp-300000000m�X$opp-358000000mV��X%phy@ae944002qcom,sc7280-dsi-phy-7nm0M �D �F� �I��dsi_phydsi_phy_lanedsi_pll*�q0' xifaceref �disabled7-edp@aea00002qcom,sc7280-edp�default�8@M � � � �2M(q00000;xcore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel-00 �//^/cdp�9�* �disabledports port@0Mendpoint �:74port@1Mendpointopp-table2operating-points-v279opp-160000000m �hX#opp-270000000m߀X$opp-540000000m /�X&opp-810000000m0G��X&phy@aec2a002qcom,sc7280-edp-phy@M �*� �"� �&� � �q'+� xauxcfg_ahb*� �disabled7/displayport-controller@ae900002qcom,sc7280-dpPM � � � � �2M (q000 00;xcore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel-0 0 �..^.cdp�;�*. �disabled7nports port@0Mendpoint �<75port@1Mendpointopp-table2operating-points-v27;opp-160000000m �hX#opp-270000000m߀X$opp-540000000m /�X%opp-810000000m0G��X&interrupt-controller@b2200002qcom,sc7280-pdcqcom,pdcM "� �((�672;8>v@�B�EVF6|a�?�� <'7�reset-controller@b5e00002qcom,sc7280-pdc-globalM ^�7�thermal-sensor@c263000 2qcom,sc7280-tsensqcom,tsens-v2 M &0� " � M�� uplowcritical (7Cthermal-sensor@c265000 2qcom,sc7280-tsensqcom,tsens-v2 M &P� "0�  M�� uplowcritical (7\reset-controller@c2a0000(2qcom,sc7280-aoss-ccqcom,sdm845-aoss-ccM *�7�power-controller@c300000#2qcom,sc7280-aoss-qmpqcom,aoss-qmpM 0�" �"*7�sram@c3f00002qcom,rpmh-statsM ?spmi@c4400002qcom,spmi-pmic-arbPM D ``p @�`�corechnlsobsrvrintrcnfg  periph_irq �� > F '<pmic@12qcom,pm7325qcom,spmi-pmicM temp-alarm@a002qcom,spmi-temp-alarmM M  (7`gpios@8800 2qcom,pm7325-gpioqcom,spmi-gpioM���= �'<7=key-vol-up-state�gpio6�normal S ` m z7jpmic@22qcom,pm8350cqcom,spmi-pmicM temp-alarm@a002qcom,spmi-temp-alarmM M  (7agpio@8800!2qcom,pm8350c-gpioqcom,spmi-gpioM���> �'<7>pwm2qcom,pm8350c-pwm � �disabledpmic@02qcom,pmk8350qcom,spmi-pmicM pon@13002qcom,pmk8350-ponM �hlospbs �disabledpwrkey2qcom,pmk8350-pwrkeyM �t �disabledresin2qcom,pmk8350-resinM �disabledadc@31002qcom,spmi-adc7M1 M1 �pmk8350-die-temp@3M �pmk8350_die_temp �pmr735a-die-temp@403M �pmr735a_die_temp �adc-tm@3400 2qcom,adc-tm7M4M4  ( �disabledrtc@61002qcom,pmk8350-rtcMab �rtcalarmMb�okaygpio@b000!2qcom,pmk8350-gpioqcom,spmi-gpioM���?�'<7?pmic@42qcom,pmr735aqcom,spmi-pmicM temp-alarm@a002qcom,spmi-temp-alarmM M  (7bgpio@8800!2qcom,pmr735a-gpioqcom,spmi-gpioM���@�'<7@pinctrl@f1000002qcom,sc7280-pinctrlM0 M���'<�v� ��7vdp-hot-plug-det-pins�gpio47�dp_hot�edp-hot-plug-det-pins�gpio60�edp_hot78mi2s0-data0-pins�gpio98 �mi2s0_data0mi2s0-data1-pins�gpio99 �mi2s0_data1mi2s0-mclk-pins�gpio96 �pri_mi2smi2s0-sclk-pins�gpio97 �mi2s0_sckmi2s0-ws-pins�gpio100 �mi2s0_wsmi2s1-data0-pins�gpio107 �mi2s1_data0��7�mi2s1-sclk-pins�gpio106 �mi2s1_sck��7�mi2s1-ws-pins�gpio108 �mi2s1_ws�7�pcie1-clkreq-n-pins�gpio79�pcie1_clkreqn `�qspi-clk-pins�gpio14 �qspi_clk�7qspi-cs0-pins�gpio15�qspi_cs�7qspi-cs1-pins�gpio19�qspi_csqspi-data01-pins�gpio12gpio13 �qspi_data `7qspi-data12-pins�gpio16gpio17 �qspi_dataqup-i2c0-data-clk-pins �gpio0gpio1�qup007;qup-i2c1-data-clk-pins �gpio4gpio5�qup017Equp-i2c2-data-clk-pins �gpio8gpio9�qup027Lqup-i2c3-data-clk-pins�gpio12gpio13�qup037Squp-i2c4-data-clk-pins�gpio16gpio17�qup047Zqup-i2c5-data-clk-pins�gpio20gpio21�qup057aqup-i2c6-data-clk-pins�gpio24gpio25�qup067hqup-i2c7-data-clk-pins�gpio28gpio29�qup077oqup-i2c8-data-clk-pins�gpio32gpio33�qup107�qup-i2c9-data-clk-pins�gpio36gpio37�qup117�qup-i2c10-data-clk-pins�gpio40gpio41�qup127�qup-i2c11-data-clk-pins�gpio44gpio45�qup137�qup-i2c12-data-clk-pins�gpio48gpio49�qup147�qup-i2c13-data-clk-pins�gpio52gpio53�qup157�qup-i2c14-data-clk-pins�gpio56gpio57�qup167�qup-i2c15-data-clk-pins�gpio60gpio61�qup177�qup-spi0-data-clk-pins�gpio0gpio1gpio2�qup007>qup-spi0-cs-pins�gpio3�qup007?qup-spi0-cs-gpio-pins�gpio3�gpioqup-spi1-data-clk-pins�gpio4gpio5gpio6�qup017Fqup-spi1-cs-pins�gpio7�qup017Gqup-spi1-cs-gpio-pins�gpio7�gpioqup-spi2-data-clk-pins�gpio8gpio9gpio10�qup027Mqup-spi2-cs-pins�gpio11�qup027Nqup-spi2-cs-gpio-pins�gpio11�gpioqup-spi3-data-clk-pins�gpio12gpio13gpio14�qup037Tqup-spi3-cs-pins�gpio15�qup037Uqup-spi3-cs-gpio-pins�gpio15�gpioqup-spi4-data-clk-pins�gpio16gpio17gpio18�qup047[qup-spi4-cs-pins�gpio19�qup047\qup-spi4-cs-gpio-pins�gpio19�gpioqup-spi5-data-clk-pins�gpio20gpio21gpio22�qup057bqup-spi5-cs-pins�gpio23�qup057cqup-spi5-cs-gpio-pins�gpio23�gpioqup-spi6-data-clk-pins�gpio24gpio25gpio26�qup067iqup-spi6-cs-pins�gpio27�qup067jqup-spi6-cs-gpio-pins�gpio27�gpioqup-spi7-data-clk-pins�gpio28gpio29gpio30�qup077pqup-spi7-cs-pins�gpio31�qup077qqup-spi7-cs-gpio-pins�gpio31�gpioqup-spi8-data-clk-pins�gpio32gpio33gpio34�qup107�qup-spi8-cs-pins�gpio35�qup107�qup-spi8-cs-gpio-pins�gpio35�gpioqup-spi9-data-clk-pins�gpio36gpio37gpio38�qup117�qup-spi9-cs-pins�gpio39�qup117�qup-spi9-cs-gpio-pins�gpio39�gpioqup-spi10-data-clk-pins�gpio40gpio41gpio42�qup127�qup-spi10-cs-pins�gpio43�qup127�qup-spi10-cs-gpio-pins�gpio43�gpioqup-spi11-data-clk-pins�gpio44gpio45gpio46�qup137�qup-spi11-cs-pins�gpio47�qup137�qup-spi11-cs-gpio-pins�gpio47�gpioqup-spi12-data-clk-pins�gpio48gpio49gpio50�qup147�qup-spi12-cs-pins�gpio51�qup147�qup-spi12-cs-gpio-pins�gpio51�gpioqup-spi13-data-clk-pins�gpio52gpio53gpio54�qup157�qup-spi13-cs-pins�gpio55�qup157�qup-spi13-cs-gpio-pins�gpio55�gpioqup-spi14-data-clk-pins�gpio56gpio57gpio58�qup167�qup-spi14-cs-pins�gpio59�qup167�qup-spi14-cs-gpio-pins�gpio59�gpioqup-spi15-data-clk-pins�gpio60gpio61gpio62�qup177�qup-spi15-cs-pins�gpio63�qup177�qup-spi15-cs-gpio-pins�gpio63�gpioqup-uart0-cts-pins�gpio0�qup007Aqup-uart0-rts-pins�gpio1�qup007Bqup-uart0-tx-pins�gpio2�qup007Cqup-uart0-rx-pins�gpio3�qup007Dqup-uart1-cts-pins�gpio4�qup017Hqup-uart1-rts-pins�gpio5�qup017Iqup-uart1-tx-pins�gpio6�qup017Jqup-uart1-rx-pins�gpio7�qup017Kqup-uart2-cts-pins�gpio8�qup027Oqup-uart2-rts-pins�gpio9�qup027Pqup-uart2-tx-pins�gpio10�qup027Qqup-uart2-rx-pins�gpio11�qup027Rqup-uart3-cts-pins�gpio12�qup037Vqup-uart3-rts-pins�gpio13�qup037Wqup-uart3-tx-pins�gpio14�qup037Xqup-uart3-rx-pins�gpio15�qup037Yqup-uart4-cts-pins�gpio16�qup047]qup-uart4-rts-pins�gpio17�qup047^qup-uart4-tx-pins�gpio18�qup047_qup-uart4-rx-pins�gpio19�qup047`qup-uart5-cts-pins�gpio20�qup057dqup-uart5-rts-pins�gpio21�qup057equp-uart5-tx-pins�gpio22�qup05��7fqup-uart5-rx-pins�gpio23�qup05� `7gqup-uart6-cts-pins�gpio24�qup067kqup-uart6-rts-pins�gpio25�qup067lqup-uart6-tx-pins�gpio26�qup067mqup-uart6-rx-pins�gpio27�qup067nqup-uart7-cts-pins�gpio28�qup07 7rqup-uart7-rts-pins�gpio29�qup07��7squp-uart7-tx-pins�gpio30�qup07��7tqup-uart7-rx-pins�gpio31�qup07 `7uqup-uart8-cts-pins�gpio32�qup107�qup-uart8-rts-pins�gpio33�qup107�qup-uart8-tx-pins�gpio34�qup107�qup-uart8-rx-pins�gpio35�qup107�qup-uart9-cts-pins�gpio36�qup117�qup-uart9-rts-pins�gpio37�qup117�qup-uart9-tx-pins�gpio38�qup117�qup-uart9-rx-pins�gpio39�qup117�qup-uart10-cts-pins�gpio40�qup127�qup-uart10-rts-pins�gpio41�qup127�qup-uart10-tx-pins�gpio42�qup127�qup-uart10-rx-pins�gpio43�qup127�qup-uart11-cts-pins�gpio44�qup137�qup-uart11-rts-pins�gpio45�qup137�qup-uart11-tx-pins�gpio46�qup137�qup-uart11-rx-pins�gpio47�qup137�qup-uart12-cts-pins�gpio48�qup147�qup-uart12-rts-pins�gpio49�qup147�qup-uart12-tx-pins�gpio50�qup147�qup-uart12-rx-pins�gpio51�qup147�qup-uart13-cts-pins�gpio52�qup157�qup-uart13-rts-pins�gpio53�qup157�qup-uart13-tx-pins�gpio54�qup157�qup-uart13-rx-pins�gpio55�qup157�qup-uart14-cts-pins�gpio56�qup167�qup-uart14-rts-pins�gpio57�qup167�qup-uart14-tx-pins�gpio58�qup167�qup-uart14-rx-pins�gpio59�qup167�qup-uart15-cts-pins�gpio60�qup177�qup-uart15-rts-pins�gpio61�qup177�qup-uart15-tx-pins�gpio62�qup177�qup-uart15-rx-pins�gpio63�qup177�sdc1-clk-pins �sdc1_clk��7-sdc1-cmd-pins �sdc1_cmd `� 7.sdc1-data-pins �sdc1_data `� 7/sdc1-rclk-pins �sdc1_rclk�70sdc1-clk-sleep-pins �sdc1_clk� 71sdc1-cmd-sleep-pins �sdc1_cmd� 72sdc1-data-sleep-pins �sdc1_data� 73sdc1-rclk-sleep-pins �sdc1_rclk� 74sdc2-clk-pins �sdc2_clk��7 sdc2-cmd-pins �sdc2_cmd `� 7 sdc2-data-pins �sdc2_data `� 7sdc2-clk-sleep-pins �sdc2_clk� 7sdc2-cmd-sleep-pins �sdc2_cmd� 7sdc2-data-sleep-pins �sdc2_data� 7amp-en�gpio63��7cbt-en-pins�gpio85�gpio ��7{nvme-pwren-pins�gpio�gpio197kpcie1-reset-n-pins�gpio2�gpio� ��7�pcie1-wake-n-pins�gpio3�gpio� `7�qup-uart7-sleep-cts-pins�gpio28�gpio 7wqup-uart7-sleep-rts-pins�gpio29�gpio�7xqup-uart7-sleep-tx-pins�gpio30�gpio `7yqup-uart7-sleep-rx-pins�gpio31�gpio `7zsd-cd-pins�gpio91�gpio `7sw-ctrl-pins�gpio86�gpio�7|wcd-reset-n�gpio83�gpio�7dwcd-reset-n-sleep�gpio83�gpio��7esram@146a5000#2qcom,sc7280-imemsysconsimple-mfdMjP` ?jP`pil-reloc@594c2qcom,pil-reloc-infoMYL�iommu@15000000!2qcom,sc7280-smmu-500arm,mmu-500M Y f ��MA`abcdefghijklmnopqrstuv������������;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXY��������������75interrupt-controller@17a00000 2arm,gic-v3 ?<' M�� M 7gic-its@17a400002arm,gic-v3-its � �M� �disabledwatchdog@17c10000#2qcom,apss-wdt-sc7280qcom,kpss-wdtM�q( Mtimer@17c20000 ? 2arm,armv7-timer-memM�frame@17c21000 MM�� frame@17c23000  M M�0 �disabledframe@17c25000  M M�P �disabledframe@17c27000  M M�p �disabledframe@17c29000  M M �disabledframe@17c2b000  M M° �disabledframe@17c2d000  MM�� �disabledrsc@182000002qcom,rpmh-rsc0M !"�drv-0drv-1drv-2$M   $ 0bcm-voter2qcom,bcm-voter7power-controller2qcom,sc7280-rpmhpd��A7*opp-table2operating-points-v27Aopp1 >opp2 >@7#opp3 >�7$opp4 >�7%opp5 >�opp6 >7&opp7 >@opp8 >�7,opp9 >�clock-controller2qcom,sc7280-rpmh-clkqBxxo*7'pm7325-regulators2qcom,pm7325-rpmh-regulators @bsmps1 MR e �7~smps7 M)� e7}smps8 M*@ e�`7ldo1 M �� eH7ldo2 M)2� e6�7ldo6 Me  e9�7�ldo7 M-*� e-*�79ldo8 M Fp e�ldo9 Mz� e��ldo11 M� e��ldo12 M u� e ��ldo13 MP e ��ldo14 Mz� e��ldo15 M �H e�`ldo16 M�� e� ldo17 M� e��7ildo18 Mw@ e��7hldo19 Mw@ ew@7:pm8350c-regulators2qcom,pm8350c-rpmh-regulators @csmps1 M!j� e!��7�smps9 MiP e�Pldo1 Mw@ e6`7,ldo2 M�  e6`ldo3 M*�� e6 ldo4 M�  e2Z�ldo5 M�  e2Z�ldo6 Mw@ e-p7ldo7 M-�� e6�ldo8 M�  e��ldo9 M-*� e-*�7ldo10 M �� e�7�ldo11 M*�� e6�7�ldo12 M-P e��ldo13 M)2� e6�bob M-� e