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�disabledusb3@510000$!marvell,armada-8k-xhcigeneric-xhci�Q@��i �corereg�??�okay�E�Fusbsata@540000$!marvell,armada-8k-ahcigeneric-ahci�T��k�??�okaysata-port@0�sata-port@1��Gxor@6a0000%!marvell,armada-7k-xormarvell,xor-v2�jk�� �corereg�??xor@6c0000%!marvell,armada-7k-xormarvell,xor-v2�lm�� �corereg�??spi@700600!marvell,armada-380-spi�pP �coreaxi�?? �disabledspi@700680!marvell,armada-380-spi�p�P �coreaxi�??�okay�defaultHspi-flash@0!jedec,spi-nor�bZpartitions!fixed-partitionspartition@0 +U-Boot-1� partition@400000 +Filesystem-1� �i2c@701000!marvell,mv78230-i2c�p �x �corereg�??�okay�defaultI1��$<i2c@701100!marvell,mv78230-i2c�p �y �corereg�?? �disabledserial@702000!snps,dw-apb-uart�p ��z��baudclkapb_pclk�?? �disabledserial@702100!snps,dw-apb-uart�p!��{��baudclkapb_pclk�?? �disabledserial@702200!snps,dw-apb-uart�p"��|��baudclkapb_pclk�?? �disabledserial@702300!snps,dw-apb-uart�p#��}��baudclkapb_pclk�?? �disablednand@720000D!marvell,armada-8k-nand-controllermarvell,armada370-nand-controller�rT�s �corereg�??x@ �disabledtrng@7600003!marvell,armada-8k-rnginside-secure,safexcel-eip76�v}�_ �corereg�??�okaysdhci@780000!marvell,armada-cp110-sdhci�x� �coreaxi�??� �disabledcrypto@800000!inside-secure,safexcel-eip197b�� 0�WXYZ[\ �memring0ring1ring2ring3eip �corereg�??� �disabledpcie@f4600000#!marvell,armada8k-pciesnps,dw-pcie ��`�� �ctrlconfig��pci�����������>�� �corereg�? ?�okay�defaultJ� �:�KLpcie@f4620000#!marvell,armada8k-pciesnps,dw-pcie ��b�� �ctrlconfig��pci�����������>�� �corereg�? ? �disabledpcie@f4640000#!marvell,armada8k-pciesnps,dw-pcie ��d�� �ctrlconfig��pci�����������>�� �corereg�? ? �disabled #address-cells#size-cellsmodelcompatibleserial0serial1gpio0spi0gpio1gpio2spi1spi2i2c0ethernet0ethernet1ethernet2gpio3gpio4ethernet3ethernet4methodrangesregno-mapinterrupt-parentdma-coherent#iommu-cells#global-interruptsstatus#interrupt-cellsinterrupt-controllerphandlemsi-controllerarm,msi-base-spiarm,msi-num-spismarvell,odmi-framesmarvell,spi-basemarvell,spi-rangesmsi-parentclocksreg-shiftreg-io-widthclock-namesmarvell,xenon-phy-slow-modepinctrl-namesbus-widthvqmmc-supplymarvell,pinsmarvell,functionoffsetngpiosgpio-controller#gpio-cellsgpio-ranges#clock-cells#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistypetripcooling-devicedevice_typeenable-method#cooling-cellsi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachemarvell,system-controllerinterrupt-namesport-idgop-port-idphy-modephysmanagedsfpphy#phy-cellsreg-namesinterrupts-extendedusb-phyphy-namespinctrl-0spi-max-frequencylabelclock-frequencypagesizenand-rbnand-ecc-modenand-on-flash-bbtnand-ecc-strengthnand-ecc-step-sizecd-gpiosno-1-8-vvmmc-supplybus-rangeinterrupt-map-maskinterrupt-mapnum-lanesnum-viewportstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltstatesenable-active-highgpiovcc-supplyregulator-always-oni2c-buslos-gpiomod-def0-gpiotx-disable-gpiotx-fault-gpiomarvell,reset-gpio